Hi there

I need some advice on VHDL coding. I'm working on a interleaver which should interleave input register bits to output register. Both register are 48 bits. The permutation is calculation in separate functionality which will produce for each running number a new number.

Example:
i new value
0 0
1 3
2 6
3 9
4 12
5 15
6 18

I'm bit puzzled around here, I'm new with vhdl so I was wondering can I use for loops for setting up this iteration? If someone could give some advices how I can get input register bits to be interleaved on certain order to output register.

Cheers, AKN