VHDL Glossary | |
IEEE Std
1076-2002 - IEEE Standard VHDL Language Reference Manual, Copyright © 2006 by the
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| There are 265 entries in the glossary. | |
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| Term | Definition |
| Overloaded | Identifiers or enumeration literals that denote two different named entities. Enumeration literals, subprograms, and predefined operators may be overloaded. At any place where an overloaded enumeration literal occurs in the text of a program, the type of the enumeration literal must be determinable from the context. |
| Parameter | A constant, signal, variable, or file declared in the interface list of a subprogram specification. The characteristics of the class of objects to which a given parameter belongs are also characteristics of the parameter. In addition, a parameter has an associated mode that specifies the direction of data flow allowed through the parameter. |
| Parameter and result type profile | Two subprograms that have the same parameter type profile, and either both are functions with the same result base type, or neither of the two is a function. |
| Parameter interface list | An interface list that declares the parameters for a subprogram. It may contain interface constant declarations, interface signal declarations, interface variable declarations, interface file declarations, or any combination thereof. |
| Parameter type profile | Two formal parameter lists that have the same number of parameters, and at each parameter position the corresponding parameters have the same base type. |
| Parent | A process or a subprogram that contains a procedure call statement for a given procedure or for a parent of the given procedure. |
| Passive process | A process statement where neither the process itself, nor any procedure of which the process is a parent, contains a signal assignment statement. |
| Physical literal | A numeric literal of a physical type. |
| Physical type | A numeric scalar type that is used to represent measurements of some quantity. Each value of a physical type has a position number that is an integer value. Any value of a physical type is an integral multiple of the primary unit of measurement for that type. |
| PnLOnIuikly | iiPGrP nxufciqemvww, [url=http://xhodtuiynedh.com/]xhodtuiynedh[/url], [link=http://tebmbvtsyneq.com/]tebmbvtsyneq[/link], http://vvhydddvmoxm.com/ |
| Port | A channel for dynamic communication between a block and its environment. A signal declared in the interface list of an entity declaration, in the header of a block statement, or in the interface list of a component declaration. In addition to the characteristics of signals, ports also have an associated mode; the mode constrains the directions of data flow allowed through the port. |
| Port interface list | An interface list that declares the inputs and outputs of a block, component, or design entity. It consists entirely of interface signal declarations. |
| Positional association | An association element that does not contain an explicit appearance of the formal designator. An actual designator at a given position in an association list corresponds to the interface element at the same position in the interface list. |
| Postponed process | An explicit or implicit process whose source statement contains the reserved word postponed. When a postponed process is resumed, it does not execute until the final simulation cycle at the current modeled time. Thus, a postponed process accesses the values of signals that are the “stable” values at the current simulated time. |
| Predefined operators | Implicitly defined operators that operate on the predefined types. Every predefined operator is a pure function. No predefined operators have named formal parameters; therefore, named association cannot be used in a function whose name denotes a predefined operation. |
| Primary | One of the elements making up an expression. Each primary has a value and a type. |
| Projected output waveform | A sequence of one or more transactions representing the current and projected future values of the driver. |
| Protected type | A type whose objects are protected from simultaneous access by more than one process. |
| Pulse rejection limit | The threshold time limit for which a signal value whose duration is greater than the limit will be propagated. A pulse rejection limit is specified by the reserved word reject in an inertially delayed signal assignment statement. |
| Pure function | A function that returns the same value each time it is called with the same values as actual parameters. An impure function may return a different value each time it is called, even when different calls have the same actual parameter values. |
| Quiet | In a given simulation cycle, a signal that is not active. |
| Range | A specified subset of values of a scalar type. |
| Range constraint | A construct that specifies the range of values in a type. A range constraint is compatible with a subtype if each bound of the range belongs to the subtype or if the range constraint defines a null range. The direction of a range constraint is the same as the direction of its range. |
| Read | The value of an object is said to be read when its value is referenced or when certain of its attributes are referenced. |
| Real literal | An abstract literal of the type universal_real that contains a base point. |
| Record type | A composite type whose values consist of named elements. |
| Reference | Access to a named entity. Every appearance of a designator (a name, character literal, or operator symbol) is a reference to the named entity denoted by the designator, unless the designator appears in a library clause or use clause. |
| Register | A kind of guarded signal that retains its last driven value when all of its drivers are turned off. |
| Regular structure | Instances of one or more components arranged and interconnected (via signals) in a repetitive way. Each instance may have characteristics that depend upon its position within the group of instances. Regular structures may be represented through the use of the generate statement. |
| Resolution | The process of determining the resolved value of a resolved signal based on the values of multiple sources for that signal. |
| Glossary & Definitions | |