VHDL Glossary | |
IEEE Std
1076-2002 - IEEE Standard VHDL Language Reference Manual, Copyright © 2006 by the
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| There are 26 entries in the glossary. | |
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| Term | Definition |
| Decimal literal | An abstract literal that is expressed in decimal notation. The base of the literal is implicitly 10. The literal may optionally contain an exponent or a decimal point and fractional part. |
| Declaration | A construct that defines a declared entity and associates an identifier (or some other notation) with it. This association is in effect within a region of text that is called the scope of the declaration. Within the scope of a declaration, there are places where it is possible to use the identifier to refer to the associated declared entity; at such places, the identifier is said to be the simple name of the named entity. The simple name is said to denote the associated named entity. |
| Declarative part | A syntactic component of certain declarations or statements (such as entity declarations, architecture bodies, and block statements). The declarative part defines the lexical area (usually introduced by a reserved word such as is and terminated with another reserved word such as begin) within which declarations may occur. |
| Declarative region | A semantic component of certain declarations or statements. Certain declarative regions include disjoint parts; for example, the declarative region of a package declaration, which, if there is an associated pacakge body, extends to the end of that package body. |
| Decorate | To associate a user-defined attribute with a named entity and to define the value of that attribute. |
| Default expression | A default value that is used for a formal generic, port, or parameter if the interface object is unassociated. A default expression is also used to provide an initial value for signals and their drivers. |
| Deferred constant | A constant that is declared without an assignment symbol (:=) and expression in a package declaration. A corresponding full declaration of the constant must exist in the package body to define the value of the constant. |
| Delta cycle | A simulation cycle in which the simulation time at the beginning of the cycle is the same as at the end of the cycle. That is, simulation time is not advanced in a delta cycle. Only nonpostponed processes can be executed during a delta cycle. |
| Denote | A property of the identifier given in a declaration. Where the declaration is visible, the identifier given in the declaration is said to denote the named entity declared in the declaration. |
| Depend | (A) (on a library unit): A design unit that explicitly or implicitly mentions other library units in a use clause. These dependencies affect the allowed order of analysis of design units. (B) (on a signal value): A property of an implicit signal with respect to some other signal. The current value of an implicit signal R is said to depend on the current value of another signal S if R denotes an implicit signal S'Stable(T), S'Quiet(T), or S'Transaction, or if R denotes an implicit GUARD signal and S is any other implicit signal named within the guard expression that defines the current value of R. |
| Descending range | A range L downto R. |
| Design entity | An entity declaration together with an associated architecture body. Different design entities may share the same entity declaration, thus describing different components with the same interface or different views of the same component. |
| Design file | One or more design units in sequence. |
| Design hierarchy | The complete representation of a design that results from the successive decomposition of a design entity into subcomponents and binding of those components to other design entities that may be decomposed in a similar manner. |
| Design library | A host-dependent storage facility for intermediate-form representations of analyzed design units. |
| Design unit | A construct that can be independently analyzed and stored in a design library. A design unit is either an entity declaration, an architecture body, a configuration declaration, a package declaration, or a package body declaration. |
| Designate | A property of access values that relates the value to some object when the access value is nonnull. A nonnull access value is said to designate an object. |
| Designated subtype | For an access type, the subtype defined by the subtype indication of the access type definition. |
| Designated type | For an access type, the base type of the subtype defined by the subtype indication of the access type definition. |
| Designator | (A) Syntax that forms part of an association element. A formal designator specifies which formal parameter, port, or generic (or which subelement or slice of a parameter, port, or generic) is to be associated with an actual by the given association element. An actual designator specifies which actual expression, signal, or variable is to be associated with a formal (or subelement or subelements of a formal).An actual designator may also specify that the formal in the given association element is to be left unassociated (with an actual designator of open). (B) An identifier, character literal, or operator symbol that defines an alias for some other name. (C) A simple name that denotes a predefined or user-defined attribute in an attribute name, or a user-defined attribute in an attribute specification. (D) A simple name, character literal, or operator symbol, and possibly a signature, that denotes a named entity in the entity name list of an attribute specification. (E) An identifier or operator symbol that defines the name of a subprogram. |
| Directly visible |
A visible declaration that is not visible by selection. A declaration is directly visible within its immediate scope, excluding any places where the declaration is hidden. A declaration occurring immediately within the visible part of a package can be made directly visible by means of a use clause.
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| Discrete array | A one-dimensional array whose elements are of a discrete type. |
| Discrete range | A range whose bounds are of a discrete type. |
| Discrete type |
An enumeration type or an integer type. Each value of a discrete type has a position number that is an integer value. Indexing and iteration rules use values of discrete types.
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| Driver | A container for a projected output waveform of a signal. The value of the signal is a function of the current values of its drivers. Each process that assigns to a given signal implicitly contains a driver for that signal. A signal assignment statement affects only the associated driver(s). |
| Driving value | The value a signal provides as a source of other signals. |
| Glossary & Definitions | |