VHDL Glossary | |
IEEE Std
1076-2002 - IEEE Standard VHDL Language Reference Manual, Copyright © 2006 by the
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| Basic operation |
An operation that is inherent in one of the following:
— An assignment (in an assignment statement or initialization) — An allocator — A selected name, an indexed name, or a slice name — A qualification (in a qualified expression), an explicit type conversion, a formal or actual designator in the form of a type conversion, or an implicit type conversion of a value of type universal_integer or universal_real to the corresponding value of another numeric type, or — A numeric literal (for a universal type), the literal null (for an access type), a string literal, a bit string literal, an aggregate, or a predefined attribute. |
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