VHDL Glossary | |
IEEE Std
1076-2002 - IEEE Standard VHDL Language Reference Manual, Copyright © 2006 by the
IEEE. The IEEE disclaims any responsibility or liability resulting from the
placement and use in this product. Information is reprinted with the permission
of the IEEE. Further distribution is not permitted without consent of the IEEE
Standards Department. If there is any questions please contact admin. | |
| You can always search for entries. | |
|
Submit Term/definitions/company | |
| Delta cycle | A simulation cycle in which the simulation time at the beginning of the cycle is the same as at the end of the cycle. That is, simulation time is not advanced in a delta cycle. Only nonpostponed processes can be executed during a delta cycle. |
| Glossary & Definitions | |


