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Dynamic partial reconfiguration on FPGA Print E-mail
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1. Introduction

          Since 80’s the FPGA market growing rapidly with varied of applications in different industries. FPGA manufactures keep updating their FPGAs with cutting edge technologies. In the recent days there is new concept evolving in FPGA industry so called Dynamic partial reconfiguration.
          The new breed of existing FPGA enabled for this feature.This makes the FPGA to be used in a new dimension with an advantage of more flexibility

1.1. What is dynamic partial reconfiguration?
          Dynamic Partial Reconfiguration provides a way to modify the implemented logic in FPGA when the device is on.More clearly DPR allows reconfiguring selected areas of a FPGA when other parts of FPGA still working. DPR is not supported on all FPGAs. For example in Xilinx Spartan 3, Virtex II, Virtex II Pro, and Virtex 4 are only supported.


2. Dynamic Partial Reconfiguration
          In this chapter we are going to discuss more detail about Dynamic Partial Reconfiguration and it is terminology. The DPR discussion on this chapter is based on Virtex Pro II. Although it is little difficult to implement DPR there are many prominent advantages in it. Let’s discuss the terms which are used in DPR design flow

pictorial view - dynamic partial reconfiguration

2.1. Dynamic Part
          The dynamic parts (dynamic modules, dmodules, d_modules, etc.) are independent parts of the input design that need not be active during the whole application runtime. They share common areas (slots) inside a target device; this is based on the assumption that they are not required to run at the same time in parallel.
          They are loaded to and unloaded from a target device as requested by the system scheduler. Usually they reside as a bit stream in a memory outside the FPGA. There some cases they also can be stored in the memory available inside the FPGA. 

2.2. Static Part
          The static part is such a part of an input design that is active during the whole application runtime. It is placed in the “static” area of a target device that is kept intact all the time.
In addition to its standard function it has to provide an infrastructure to load and unload other (dynamic) parts of the design, which is system scheduling, data management, and interface management.
          The static part must include the configuration controller and logic required for data and interface management. All inputs/outputs of the application are managed by the static part that communicates with dynamic modules through a fixed interface.