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Condition coverage - Some tools support this feature. This is an extension of branch coverage. Condition coverage breaks down branch conditions into the elements that make the result true or false. If there are any conditions in an ‘if’ statement are missed during executing then the tool will notify. Statement coverage - It count all executable statements in a code and makes ratio of unexecuted statement during the current simulation. Executable statements are those that have a definite action during runtime and do not include comments, compile directives or declarations. At end of this document there is a worked example for this type of coverage. Variable coverage - Multi bit variables are monitored in this coverage. It allow to track toggles, range and values on vector (more than one bit) variables FSM coverage - Finite state machine coverage, it helps to analyze variety of styles of state machine written in RTL. Expression coverage - Expression coverage brings statistics for all expressions in the HDL code. Expression can be continues or procedural assignments. It identifies the expressions which are not sufficiently exercised. Toggle coverage - A design includes various objects like bit, reg, wire, signals. These objects might or might not change during simulation run. Toggle coverage measures these signals' activities. It is very useful in gate level testing. It also gives approximate power consumption of the circuit. Example for code coverage. There are two modules, mux.v - This is DUT, it is a 4 to 1 mux. tb_mux.v - Test bench for mux which generates test vectors for DUT. The quality of this test bech for DUT is going to be checked now.
module mux (sel_a,sel_b,data_4bit,out); |



