IEEE Std 1076-2002 - IEEE Standard VHDL Language Reference Manual, Copyright © 2006 by the IEEE. The IEEE disclaims any responsibility or liability resulting from the placement and use in this product. Information is reprinted with the permission of the IEEE. Further distribution is not permitted without consent of the IEEE Standards Department. If there is any questions please contact admin.
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A literal of the universal_real abstract type or the universal_integer abstract type.
The mode in which a file object is opened, which can be either read-only or write-only. The access mode depends on the value supplied to the Open_Kind parameter.
A type that provides access to an object of a given type. Access to such an object is achieved by an access value returned by an allocator; the access value is said to designate the object.
A value of an access type. This value is returned by an allocator and designates an object (which must be a variable) of a given type. A null access value designates no object. An access value can only designate an object created by an allocator; it cannot designate an object declared by an object declaration.
A driver that acquires a new value during a simulation cycle regardless of whether the new value is different from the previous value.
An expression, a port, a signal, or a variable associated with a formal port, formal parameter, or formal generic.
(A) The kind of expression, denoting a value of a composite type. The value is specified by giving the value of each of the elements of the composite type. Either a positional association or a named association must be used to indicate which value is associated with which element.
(B) A kind of target of a variable assignment statement or signal assignment statement assigning a composite value. The target is then said to be in the form of an aggregate.
|Aias||An alternate name for a named entity.|
An operation used to create anonymous, variable objects accessible by means of access values.
The syntactic and semantic analysis of source code in a VHDL design file and the insertion of intermediate form representations of design units into a design library.
The undefined simple name of an item, which is created implicitly. The base type of a numeric type or an array type is anonymous; similarly, the object denoted by an access value is anonymous.
A prefix is said to be appropriate for a type if the type of the prefix is the type considered, or if the type of the prefix is an access type whose designated type is the type considered.
A body associated with an entity declaration to describe the internal organization or operation of a design entity. An architecture body is used to describe the behavior, data flow, or structure of a design entity.
|Array object||An object of an array type.|
A type, the value of which consists of elements that are all of the same subtype (and hence, of the same type). Each element is uniquely distinguished by an index (for a one-dimensional array) or by a sequence of indexes (for a multidimensional array). Each index must be a value of a discrete type and must lie in the correct index range.
|Ascending range||A range L to R.|
The American Standard Code for Information Interchange. The package Standard contains the definition of the type character, the first 128 values of which represent the ASCII character set.
A violation that occurs when the condition of an assertion statement evaluates to false.
The single driver for a signal in the (explicit or equivalent) process statement containing the signal assignment statement.
|Associated in whole|
When a single association element of a composite formal supplies the association for the entire formal.
A property of a formal port, generic, or parameter of a composite type with respect to some association list. A composite formal whose association is defined by multiple association elements in a single association list is said to be associated individually in that list. The formats of such association elements must denote non-overlapping subelements or slices of the formal.
An element that associates an actual or local with a local or formal.
A list that establishes correspondences between formal or local port or parameter names and local or actual names or expressions.
A definition of some characteristic of a named entity. Some attributes are predefined for types, ranges, values, signals, and functions. The remaining attributes are user defined and are always constants.
A set of characteristic expressions, each corresponding to some quantity or the scalar subelement thereof, used to determine an analog solution point.
A lexical element that indicates whether a bit string literal is to be interpreted as a binary, octal, or hexadecimal value.
The type from which a subtype defines a subset of possible values, otherwise known as a constraint. This subset is not required to be proper. The base type of a type is the type itself. The base type of a subtype is found by recursively examining the type mark in the subtype indication defining the subtype. If the type mark denotes a type, that type is the base type of the subtype; otherwise, the type mark is a subtype, and this procedure is repeated on that subtype.
An abstract literal expressed in a form that specifies the base explicitly. The base is restricted to the range 2 to 16.
An operation that is inherent in one of the following:
— An assignment (in an assignment statement or initialization)
— An allocator
— A selected name, an indexed name, or a slice name
— A qualification (in a qualified expression), an explicit type conversion, a formal or actual designator in the form of a type conversion, or an implicit type conversion of a value of type universal_integer or universal_real to the corresponding value of another numeric type, or
— A numeric literal (for a universal type), the literal null (for an access type), a string literal, a bit string literal, an aggregate, or a predefined attribute.
A signal that determines the driving values for all other signals. A basic signal is
— Either a scalar signal or a resolved signal
— Not a sub element of a resolved signal
— Not an implicit signal of the form S'Stable(T), S'Quiet(T), or S'Transaction, and
— Not an implicit signal GUARD.
|Glossary & Definitions|